FMA instruction set

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• The update expands the factual landscape about which CPUs and instruction-set extensions actually implement FMA (notably AVX-512 in Knights Landing and limitations in Jasper Lake), and it adds explicit AVX-512 context to compiler/assembler notes.

Replace “The FMA instruction set is an extension to the 128 and 256 bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply add FMA operations.” with “The FMA instruction set is an extension to the x86 microprocessor instruction set to perform fused multiply add FMA operations.”. Add: Intel Haswell 2013 and newer processors except Pentium s and Celeron s and low power processors based on Goldmont and Tremont such as Jasper Lake 2021 which lack AVX and support extensions only up to SSE4 2. Add: June 2016 Intel Xeon Phi Knights Landing processors are the first to support AVX 512 which adds fused multiply add on 512 bit vectors. Add: The first generation of AMD Ryzen processors officially supports FMA3.

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